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Silicon Labs /Series0 /EZR32LG /EZR32LG330F64R63 /LESENSE /ALTEXCONF

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Interpret as ALTEXCONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLE)IDLECONF0 0 (DISABLE)IDLECONF1 0 (DISABLE)IDLECONF2 0 (DISABLE)IDLECONF3 0 (DISABLE)IDLECONF4 0 (DISABLE)IDLECONF5 0 (DISABLE)IDLECONF6 0 (DISABLE)IDLECONF7 0 (AEX0)AEX0 0 (AEX1)AEX1 0 (AEX2)AEX2 0 (AEX3)AEX3 0 (AEX4)AEX4 0 (AEX5)AEX5 0 (AEX6)AEX6 0 (AEX7)AEX7

IDLECONF7=DISABLE, IDLECONF3=DISABLE, IDLECONF5=DISABLE, IDLECONF4=DISABLE, IDLECONF2=DISABLE, IDLECONF6=DISABLE, IDLECONF1=DISABLE, IDLECONF0=DISABLE

Description

Alternative excite pin configuration

Fields

IDLECONF0

ALTEX0 idle phase configuration

0 (DISABLE): ALTEX0 output is disabled in idle phase

1 (HIGH): ALTEX0 output is high in idle phase

2 (LOW): ALTEX0 output is low in idle phase
IDLECONF1

ALTEX1 idle phase configuration

0 (DISABLE): ALTEX1 output is disabled in idle phase

1 (HIGH): ALTEX1 output is high in idle phase

2 (LOW): ALTEX1 output is low in idle phase
IDLECONF2

ALTEX2 idle phase configuration

0 (DISABLE): ALTEX2 output is disabled in idle phase

1 (HIGH): ALTEX2 output is high in idle phase

2 (LOW): ALTEX2 output is low in idle phase
IDLECONF3

ALTEX3 idle phase configuration

0 (DISABLE): ALTEX3 output is disabled in idle phase

1 (HIGH): ALTEX3 output is high in idle phase

2 (LOW): ALTEX3 output is low in idle phase
IDLECONF4

ALTEX4 idle phase configuration

0 (DISABLE): ALTEX4 output is disabled in idle phase

1 (HIGH): ALTEX4 output is high in idle phase

2 (LOW): ALTEX4 output is low in idle phase
IDLECONF5

ALTEX5 idle phase configuration

0 (DISABLE): ALTEX5 output is disabled in idle phase

1 (HIGH): ALTEX5 output is high in idle phase

2 (LOW): ALTEX5 output is low in idle phase
IDLECONF6

ALTEX6 idle phase configuration

0 (DISABLE): ALTEX6 output is disabled in idle phase

1 (HIGH): ALTEX6 output is high in idle phase

2 (LOW): ALTEX6 output is low in idle phase
IDLECONF7

ALTEX7 idle phase configuration

0 (DISABLE): ALTEX7 output is disabled in idle phase

1 (HIGH): ALTEX7 output is high in idle phase

2 (LOW): ALTEX7 output is low in idle phase
AEX0

ALTEX0 always excite enable
AEX1

ALTEX1 always excite enable
AEX2

ALTEX2 always excite enable
AEX3

ALTEX3 always excite enable
AEX4

ALTEX4 always excite enable
AEX5

ALTEX5 always excite enable
AEX6

ALTEX6 always excite enable
AEX7

ALTEX7 always excite enable

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data